1. Field of the Invention
The invention arrangements relate to the field of LCOS (liquid crystal on silicon) and/or LCD (liquid crystal display) video display systems, both reflective and transmissive.
2. Description of Related Art
Liquid crystal on silicon (LCOS) can be thought of as one large liquid crystal formed on a silicon wafer. The silicon wafer is divided into an incremental array of tiny plate electrodes. A tiny incremental region of the liquid crystal is influenced by the electric field generated by each tiny plate and the common plate. Each such tiny plate and corresponding liquid crystal region are together referred to as a cell of the imager. Each cell corresponds to an individually controllable pixel. A common plate electrode is disposed on the other side of the liquid crystal. Each cell, or pixel, remains lighted with the same intensity until the input signal is changed, thus acting as a sample and hold. The pixel does not decay, as is the case with the phosphors in a cathode ray tube. Each set of common and variable plate electrodes forms an imager. One imager is provided for each color, in this case, one imager each for red, green and blue.
It is typical to drive the imager of an LCOS display with a frame-doubled signal to avoid 30 Hz flicker, by sending first a normal frame (positive picture) and then an inverted frame (negative picture) in response to a given input picture. The generation of positive and negative pictures ensures that each pixel will be written with a positive electric field followed by a negative electric field. The resulting drive field has a zero DC component, which is necessary to avoid the image sticking, and ultimately, permanent degradation of the imager. It has been determined that the human eye responds to the average value of the brightness of the pixels produced by these positive and negative pictures.
The drive voltages are supplied to plate electrodes on each side of the LCOS array. In the presently preferred LCOS system to which the inventive arrangements pertain, the common plate is always at a potential of about 8 volts. This voltage can be adjustable. Each of the other plates in the array of tiny plates is operated in two voltage ranges. For positive pictures, the voltage varies between 0 volts and 8 volts. For negative pictures the voltage varies between 8 volts and 16 volts.
The light supplied to the imager, and therefore supplied to each cell of the imager, is field polarized. Each liquid crystal cell rotates the polarization of the input light responsive to the root mean square (RMS) value of the electric field applied to the cell by the plate electrodes. Generally speaking, the cells are not responsive to the polarity (positive or negative) of the applied electric field. Rather, the brightness of each pixel's cell is generally only a function of the rotation of the polarization of the light incident on the cell. As a practical matter, however, it has been found that the brightness can vary somewhat between the positive and negative field polarities for the same polarization rotation of the light. Such variation of the brightness can cause an undesirable flicker in the displayed picture.
In this embodiment, in the case of either positive or negative pictures, as the field driving the cells approaches a zero electric field strength, corresponding to 8 volts, the closer each cell comes to white, corresponding to a full on condition. Other systems are possible, for example where the common voltage is set to 0 volts. It will be appreciated that the inventive arrangements taught herein are applicable to all such positive and negative field LCOS imager driving systems.
Pictures are defined as positive pictures when the variable voltage applied to the tiny plate electrodes is less than the voltage applied to the common plate electrode, because the higher the tiny plate electrode voltage, the brighter the pixels. Conversely, pictures are defined as negative pictures when the variable voltage applied to the tiny plate electrodes is greater than the voltage applied to the common plate electrode, because the higher the tiny plate electrode voltage, the darker the pixels. The designations of pictures as positive or negative should not be confused with terms used to distinguish field types in interlaced video formats.
The present state of the art in LCOS requires the adjustment of the common-mode electrode voltage, denoted VITO, to be precisely between the positive and negative field drive for the LCOS. The subscript ITO refers to the material indium tin oxide. The average balance is necessary in order to minimize flicker, as well as to prevent a phenomenon known as image sticking.
In the following description, the term fHin is used herein to denote the horizontal scanning frequency of an input video signal. The term fVin is used to denote the vertical scanning frequency of an input video signal. In the standard definition interlaced NTSC system, fHin might be 15,750 Hz (1fH) or 31,500 Hz (2fH). Typically, fVin is 60 Hz for NTSC and 50 Hz for PAL. High definition formats have been defined by the ATSC. The term 480p refers to a video signal having 480 lines of video in each progressive (non-interlaced) frame.
A 720p video signal has 720 lines of video in each frame. The term 1080i refers to a video signal having 1,080 interlaced horizontal lines in top and bottom fields, each field having 540 horizontal lines. In accordance with this convention, the term 720i would denote 720 lines of interlaced video per frame and the term 1080p would denote 1,080 lines of progressive horizontal lines in each frame. Typically, such high definition systems have an fHin ≧2fH.
The letter n is used herein to denote a multiple of fHin or fVin. Assume, for example, that a 480p input video signal is speeded up by the multiple n=2. Since fHin=2fH the horizontal scanning frequency is doubled to 4fH. Assume, for example, that the same 480p input video signal is subjected to a 1/n-frame delay, also where n=2. Since the 480p input video signal has an fVin=60 Hz, the delay is 1/120 second. The multiple n need not be an integer. If fHin=2.14fH, and n=2, the video signal is speeded up to 4.28fH. A 720p video signal, for example, has fHin=3fH. If fHin=3fH and n=2, the video signal is speeded up to 6fH.
In order to avoid visible flicker, it is common practice to use a higher vertical scanning frequency, or frame rate, to suppress flicker. In an NTSC system, for example, if n=2 a frame rate of 60 Hz is doubled to a frame rate of 120 Hz. In a PAL system, a field rate of 50 Hz is doubled to a field rate of 100 Hz. However, the higher frame rate or field rate makes adjustment of the common mode electrode voltage more difficult because the flicker is not visible to the human eye. An operator can not make the necessary adjustments without special instruments.
Faster frame rates have required frame rate doublers, that is, a circuit that can cause each picture to be scanned twice within each frame period of the incoming video signal. A 60 Hz frame rate has a frame period of 1/60 second. Doubling a frame rate of 60 Hz requires scanning at 120 Hz. A 120 Hz frame rate has a frame period of 1/120 second. If an incoming video signal has a horizontal scanning frequency of 2fH, where fH is for example a standard NTSC horizontal scanning rate, and a standard frame rate of 60 Hz, the pictures must be displayed at 4fH and 120 Hz. In other words, each picture must be displayed twice during each 60 Hz frame period, that is, in every 1/60 second. Each line must be written to the display at 4fH.
In accordance with the prior art, frame rate doublers utilize two full frame memories in a so-called ping-pong arrangement. A frame is written into one memory as another frame is read out of the other memory, and vice versa, in an alternating manner. This technique always incurs a full frame period of video delay because neither of the ping-pong frame memories can be read out until a full frame has been written in. Accordingly, the audio signal must be delayed to match the video delay. It was known that the memory requirements could be reduced to one full frame memory by proper utilization of the memory in a correctly implemented video speedup arrangement. However, for any frame multiplication greater than doubling, the alternative use of one full frame memory is not workable. Two full frame memories are always required in such a situation.